1. Field of the Invention
The present invention relates to a solid-state image pickup device applicable to integrated video cameras and digital still cameras and a drive method thereof.
2. Description of the Related Art
Recently, solid-state image pickup devices have been extensively used in the image pickup part of integrated video cameras. Particularly, CCD (charge coupled device) solid-state image pickup devices having excellent noise properties have been extensively used (for example, reference Japanese Laid-Open Patent Application Publication No. H04-180265).
FIG. 3 is a diagrammatic plane view showing a structure of a prior art solid-state image pickup device. As shown in FIG. 3, prior art solid-state image pickup device 100 comprises a pixel area 2 where received light is converted to electric signals through photoelectric conversion. Multiple pixels are two-dimensionally arranged in the pixel area 2. Each pixel has a photodiode generating signal charge according to incident light. Furthermore, multiple a vertical transfer parts (vertical CCDs) for vertically transferring (the up-and-down direction in FIG. 3) signal charges generated at the pixels are provided in the pixel area 2. Here, the vertical transfer parts are of a four-phase drive type wherein first to fourth charge transfer electrodes to which drive signals (vertical transfer signals) different from each other are applied are repeatedly provided.
A horizontal transfer part (horizontal CCD) 3 for horizontally (the transversal direction in FIG. 3) transferring the signal charges transferred vertically in the pixel area 2 by the vertical transfer part is placed in juxtaposition with the pixel area 2. Here, the horizontal transfer part 3 is of a two-phase drive type wherein fifth and sixth charge transfer electrodes to which drive signals (horizontal transfer signals) different from each other are applied are repeatedly provided. The signal charges horizontally transferred by the horizontal transfer part 3 are supplied to an amplifier constituting a signal output part 4 in sequence and output as image signals via an output terminal 5.
A first vertical signal input line 6, a second vertical signal input line 7, a third vertical signal input line 8, and a fourth vertical signal input line 9 are connected to the pixel area 2. The vertical signal input lines 6 to 9 are connected to first to the fourth charge transfer electrodes constituting the vertical transfer part, respectively. A first vertical signal input terminal 10, a second vertical signal input terminal 11, a third vertical signal input terminal 12, and a fourth vertical signal input terminal 13 are connected to the vertical signal input lines 6 to 9, respectively. Vertical transfer signals for transferring signal charges vertically in the pixel area 2 are applied to the first to fourth charge transfer electrodes via the vertical signal input terminals 10 to 13.
Furthermore, a first horizontal signal input line 14 and a second horizontal signal input line 15 are connected to the horizontal transfer part 3. The horizontal signal input lines 14 and 15 are connected to the fifth and sixth charge transfer electrodes constituting the horizontal transfer part 3, respectively. A first horizontal signal input terminal 21 and a second horizontal signal input terminal 22 are connected to the horizontal signal input lines 14 and 15, respectively. Horizontal transfer signals for horizontally transferring the signal charges are applied to the horizontal transfer part 3 via the horizontal signal input terminals 21 and 22. The solid-state image pickup device 100 further comprises a power terminal 24 to which a power supply voltage driving the signal output part 4 is applied, a ground terminal 25 to which a reference potential is applied, and a reset terminal 26.
FIGS. 4A and 4B are timing charts of pulse signals supplied to the vertical signal input terminals 10 to 13 and horizontal signal input terminals 21 and 22 for driving the solid-state image pickup device 100 having the above structure. The timing chart of FIG. 4B is an enlarged view of a part of the timing chart of FIG. 4A (the part enclosed by dash-dot lines) in the time axis direction. FIGS. 4A and 4B show pulse signal waveforms by solid lines. Additional dotted lines are used to clarify the potential levels of pulse waveforms. In FIGS. 4A and 4B, pulse signals V1, V2, V3, and V4 are pulse signals applied to the vertical signal input terminals 10, 11, 12, and 13, respectively, and pulse signals H1 and H2 are pulse signals applied to the horizontal signal input terminals 21 and 22, respectively. The pulse waveforms each have a high level (“Hi” in FIGS. 4A and 4B) and a low level (“Lo” in FIGS. 4A and 4B), which are specific, fixed potential levels. In FIG. 4A, the waveforms of the pulse signals H1 and H2 are shown in a simplified manner for time frames in which the pulse signals alternately have a high level and a low level.
When the solid-state image pickup device 100 is driven according to the timing charts shown in FIGS. 4A and 4B, signal charges generated in the pixel area 2 are vertically transferred upon application of the pulse signals V1, V2, V3, and V4. Then, the signal charges are horizontally transferred upon application of the pulse signals H1 and H2 and image signals are output from the solid-state image pickup device 100 via the signal output part 4 and output terminal 5.